In many application like digital control loops or sensor applications with digital outputs, sigma-delta analog-to-digital converters (ADCs) having a high sampling rate, e.g. using oversampling, to obtain a high resolution are used. In case the analog-to-digital converter is used for a digital control loop, a group delay of a signal measured and digitized by the analog-to-digital converter may be required to be small. In sensor applications, it is desirable to obtain a measurement value with high precision within a short time and then deactivate the sensor again to reduce losses. In both examples, it is desirable to convert the sigma delta signal having a high sampling rate to a digital signal having a reduced sampling rate and a high resolution quickly. Such a conversion from a high sampling rate to a lower sampling rate is referred to as decimation. A high speed of decimation to obtain a reliable signal may be desirable, in particular in some applications for error detection like short circuit detection.
Conventionally used decimation filters include comb filters. Such conventional filters may have a relatively high group delay.
Another approach for decimation is a combination of an integrator with a so-called “windowing”, where a block of digital samples is weighted by a window function and then integrated. In this approach, a high window length, corresponding to an integration over many digital samples, increases accuracy, but also increases a time needed to provide a decimated signal and therefore reduces the speed of decimation.